VERILOG HDL A Guide to Digital Design and Synthesis
By: Palnitkar,Samir.
Contributor(s): Prabhu Goel [Foreword].
Material type: BookPublisher: Uttara Pradesh Pearson 2003Edition: 2nd ed.Description: 491p.ISBN: 9788177589184.Subject(s): Digital Design,Dataflow Modeling,Logic SynthesisDDC classification: 621.392 PALItem type | Current location | Shelving location | Call number | Status | Date due | Barcode |
---|---|---|---|---|---|---|
Books | NIT Andhra | 621.392 PAL (Browse shelf) | Checked out | 08/11/2024 | 18237 | |
Books | NIT Andhra | Reference | 621.392 PAL (Browse shelf) | Not For Loan | 16631 |
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621.392 HEU Computer Systems Design and Architecture | 621.392 JOH Priciples Of Digital System Design (With CD) | 621.392 MAN Digital Logic and Computer Design | 621.392 PAL VERILOG HDL A Guide to Digital Design and Synthesis | 621.392 PER VHDL: Programming by Example | 621.395 ANA VLSI DESIGN | 621.395 ANA VLSI DESIGN |
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