Palnitkar,Samir <br/><br/>
VERILOG HDL  A Guide to Digital Design and Synthesis 

 - 2nd ed 
 - Uttara Pradesh  Pearson  2003 
 - 491p 
<br/><br/><label>ISBN: </label>9788177589184 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Digital Design,Dataflow Modeling,Logic Synthesis
<br/><br/><label>Dewey Class. No.: </label>621.392 PAL